Vitis Model Composer

AMD Vitis™ Model Composer is a comprehensive high-level design and simulation platform that facilitates the transition from algorithm development to hardware implementation. It is deeply integrated with Simulink, allowing developers to design and simulate hardware-accelerated algorithms graphically. This platform is particularly beneficial for algorithm developers who prefer a model-based design approach and aim to expedite the transition to hardware implementation without initially writing low-level HDL or AI Engine C code.

Key features of Vitis Model Composer include:

• Analysis, Debugging & Visualization: Utilize the MATLAB and Simulink environment to analyze and visualize designs, using optimized AI Engine, HLS, and HDL blocks directly from the Simulink library. Import custom code as blocks, run fast simulations, and compare results with golden references.
• Co-Simulation: Co-simulate heterogeneous systems by seamlessly connecting AI Engine arrays with HLS kernel blocks or HDL blocks.
• Code Generation: Enhance productivity by generating graph code, RTL (Verilog/VHDL), optimized HLS code, and testbenches from your design.
• Hardware Validation: Easily validate designs in hardware by generating necessary files and moving the design into hardware with a single click.

Vitis Model Composer supports the creation and simulation of HDL, HLS, and AI Engine designs, including heterogeneous designs combining AI Engine and programmable logic components. The platform also provides an introduction to the AMD Vitis Model Composer Hub block, which aids in hardware selection, code generation, design analysis, verification, and hardware validation.

Specialized for use with Versal AI Engines, Vitis Model Composer offers prebuilt AI Engine IP blocks for DSP and signal processing tasks, such as FIR filters, FFT, DDS, and mixers. Users can import custom AI Engine kernels and dataflow graphs into Simulink, facilitating the configuration and connection of complex compute pipelines.

Recent updates include additional blocks for AI Engine and HDL, enhanced FFT and FIR capabilities, support for multirate systems, and compatibility with MATLAB® R2025b and Red Hat® Enterprise Linux® (RHEL) 9.6, 10.0.