Vitis HLS

AMD Vitis™ HLS is designed to enhance the productivity of RTL designers by enabling the synthesis of C/C++ functions into RTL, facilitating the creation of complex FPGA algorithms. It integrates seamlessly with the Vivado™ Design Suite for synthesis and place & route, as well as the Vitis™ unified software platform for heterogeneous system designs.

With Vitis HLS, users can apply directives to C code to generate RTL tailored to specific implementations. This allows for the creation of multiple design architectures from a single C source code, ensuring high-quality, correct-by-construction RTL. The tool supports C simulation for design validation, offering faster iterations compared to traditional RTL-based simulations.

Vitis HLS includes a comprehensive set of analysis and debugging tools to optimize designs. It supports high-performance designs, with benchmarks indicating that many designs can achieve FMAX of 500MHz or more using high-level programming methodologies.

Key Features

• Performance pragma for high-quality results.
• Support for parallel programming constructs such as tasks, vectors, and streams.
• MATLAB-to-HLS C++ code generation via MathWorks HDL Coder.
• Built-in simulation flows for faster verification.
• IP export options for hardware acceleration and RTL IP integration.

The tool synthesizes C code into RTL by converting top-level function arguments into RTL I/O ports and maintaining design hierarchy. It optimizes performance through loop pipelining and array targeting to memory resources like BRAM, LUTRAM, and URAM. Users can review performance metrics such as latency and resource utilization through synthesis reports.

Vitis HLS also supports C/RTL co-simulation, reusing C test benches for RTL validation, and provides integrated analysis, debugging, and waveform viewing capabilities. The output can be packaged into compiled object files or exported as RTL IP for use in various design tools.

Recent updates include performance pragma enhancements, new IP support, ease-of-use features, and support for MATLAB-generated C++ code. The tool continues to evolve with features that simplify HLS design and improve performance and debugging capabilities.