Integrity 3D-IC Platform

The Integrity 3D-IC Platform offers a comprehensive solution for 3D integrated circuit design, covering integration, packaging, custom and digital implementation, verification, system analysis, and interconnect IP for chiplet-based designs. This unified platform facilitates 3D design planning, implementation, and system analysis, enabling hardware and software co-verification and full-system power analysis using emulation and prototyping. It optimizes power, performance, and area (PPA) for latency, bandwidth, and power efficiency.

With over 25 years of advanced packaging experience, the platform supports heterogeneous integration of different dies for 2.5D or 3D designs, ensuring higher bandwidth, lower power consumption, and reduced area without traditional process scaling. It caters to various applications, including AI, data centers, graphics, and mobile communications ICs, with a smaller form factor.

Key Features

• Multi-chiplet planning and implementation using the Innovus Implementation System for diverse packaging styles.
• Die/package planning and route optimization with the Integrity System Planner for efficient connectivity assessment.
• Logic die design for test (DFT) with Genus Synthesis Solution and Modus DFT Software.
• Electrical signoff and system analysis using Pegasus Verification System, Quantus Extraction Solution, and Tempus Timing Signoff Solution.
• Thermal management capabilities with Voltus IC Power Integrity Solution and Celsius Thermal Solver.
• Multi-die physical verification with Pegasus Verification System for advanced-node ICs.
• Hardware/software validation and power analysis with Palladium Z2 Enterprise Emulation Platform.
• Chiplet-based PHY IP optimized for latency, bandwidth, and power, supporting high-speed interconnects like PCIe and CXL.

The platform's innovative architecture and integrated cloud processing provide a flexible computing environment, enabling rapid design rule check (DRC) performance and reducing turnaround time. This allows designers to bring advanced-node designs to market faster.